集成电路设计

  • 上海
  • 面议
  • 大专及以上
  • 面议

工作地址: 上海市闸北区裕通路100号(地铁1/12/13号线汉中路站)

刷新日期: 2019-03-11  截止日期: 2019-04-06

职位描述

Job
Description:

Work on analog circuit design of analog IPs for SoC. The IPs may include
ADC/DAC, comparator, op-amp, bandgap reference, LDO, oscillator and FLL/PLL.

Support layout engineers on custom layout.

Evaluation of the design in the lab.

Participating in design reviews and creating the necessary documentation.

Work closely with digital design engineers to support IP integration and
RTL/AMS verification.
Qualifications:

Master in Electrical Engineering or related, real project experience of mixed
signal ICs is a plus.

Solid knowledge about process and device is a must.

Good communication and problem-solving skills along with proficiency in writing
and speaking English.

Experience with the Cadence digital design tools is beneficial.

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